1. Field of the Invention
The present invention relates to a sorting processor for sorting and processing polygonal information.
2. Description of the Related Art
For example, a Z-sorting method is generally used when a three-dimensional image is processed in three-dimensional graphics, game machines, workstations, word processors, personal computers, etc. In the Z-sorting method, a sorting operation image data is performed in hidden-surface processing by setting a Z-axis in a depth direction of a screen to a reference axis.
When the Z-sorting method is used in the three-dimensional image processing, a polygonal information generating circuit, a sorting circuit and a polygonal display circuit are used as disclosed in e.g., Japanese Patent Application Laying Open (KOKAI) No. 1-103785. These circuits are constructed such that a pseudo three-dimensional image as a two-dimensional image showing a three-dimensional image is synthesized and displayed on a cathode ray tube (CRT) display.
In this case, the polygonal information generating circuit processes three-dimensional image information. The polygonal information generating circuit performs various kinds of converting and transforming operations such as rotation, parallel displacement, perspective projection, etc. with respect to the three-dimensional image information. Thus, the polygonal information generating circuit converts the three-dimensional image information to be displayed to combinational information of two-dimensional polygons. The polygonal information generating circuit calculates X and Y coordinates at an end point as a vertex of each of the polygons as polygonal information.
A display point of each of the polygons in a depth direction thereof is shown by a Z-coordinate of a central point of each of the polygons. The polygonal information generating circuit also calculates this Z-coordinate as polygonal information. Further, in accordance with necessity, the polygonal information generating circuit calculates color information, brightness information, etc. of the polygons as additional data.
The polygonal information generating circuit further geometrically transforms information such as X and Y coordinates at each of end points of these polygons, a Z-coordinate in a central position of each of the polygons, etc. Thereafter, the geometrically transformed information are sorted by a sorter using the Z-sorting method.
In this general Z-sorting method, when a polygonal shape is complicated and the number of polygons is increased, the number of vertexes of the polygons to be geometrically transformed is increased. As a result, there is a case in which an amount of the polygonal information to be geometrically transformed by the polygonal information generating circuit is very increased before these polygonal information are sorted. Therefore, a geometrical transformation processing time of information of one frame in the polygonal information generating circuit is longer than a time (which is called one frame time in the following description) required to process information of one frame in a sorting processing circuit. Accordingly, a so-called frame delay is caused in a certain case. In this frame delay, a portion of the information data is delayed and sorted when the next frame information is processed by the sorting processing circuit.
It is necessary to dispose a buffer RAM to prevent such a frame delay from being caused. In this case, the buffer RAM is disposed to input geometrical transformation results of one frame obtained by a geometrical transforming device to the sorting processing circuit at predetermined timing.